1. Field of the Invention
The present invention relates to etchant formulations for semiconductor device production. More particularly, the present invention relates to an etchant formulation with high selectivity between BPSG and TEOS and methods for use of the formulation.
2. State of the Art
Etching is a process for removing material in a specific area through a wet (liquid) or dry (gaseous/vapor) chemical reaction, or by physical removal (such as by sputter etch, in which the specific area is bombarded with radio frequency-excited ions to knock atoms from the specific area). Etching is used in a variety of applications in the fabrication of semiconductor devices. For illustration purposes, vapor etching of bit line openings for a DRAM (Dynamic Random Access Memory) will be discussed.
A widely-utilized DRAM manufacturing process utilizes CMOS (Complementary Metal Oxide Semiconductor) technology to produce DRAM circuits which circuits, comprise an array of unit memory cells, each typically including one capacitor and one transistor, such as a field effect transistor (“FET”). In the most common circuit designs, one side of the transistor is connected to one side of the capacitor, the other side of the transistor and the transistor gate are connected to external circuit lines called the bit line and the word line, and the other side of the capacitor is connected to a reference voltage that is typically one-half the internal circuit voltage. In such memory cells, an electrical signal charge is stored in a storage node of the capacitor connected to the transistor which charges and discharges the circuit lines of the capacitor.
It is known that hydrofluoric acid can be used as an etchant and is selective for BPSG to TEOS. In fact, the selectivity for BPSG to TEOS with hydrofluoric acid alone can be as high as 1000:1 in vapor etch and as low as less than 10:1 for dilute hydrofluoric acid solutions. However, there are some disadvantages associated with vapor etch such as high particle counts and low productivity. Consequently, a wet etchant which could perform the role of high selective vapor would be advantageous.
Therefore, it would be desirable to develop an etchant and a method of use which would eliminate the risk of damaging the surface of the semiconductor substrate without having to use an etch stop layer.